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Research Article

Novel Design of Ternary Arithmetic Circuits

Open Access Peer Reviewed

Authors

  • B.Alekya Himabindu1
  • D.Sai Kumar2
  • G.Mahendra3
  • D.Madhu Srikanth4
  • K.Dinesh Reddy5

1Assistant Professor, Dept. of ECE, Santhiram Engineering College, Nandyal, Andhra Pradesh, India. 2345 Student, Dept. of ECE, Santhiram Engineering College, Nandyal, Andhra Pradesh, India.

Article Information

DOI
No DOI
Published Online
July-August 2022
Pages
172-183
Article Type
Research Article
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Abstract

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Abstract: Over the few decades, complementary metal oxide semiconductor technology has led to the development of digital systems. However, the dimension scaling of CMOS approach is limit, to overcome this disadvantage carbon nano tube FETS (CNTFETs) are came into existence. Here changing of the thresholdvoltage of the CNTFETs are possible by varying its dimensions(length, width). They enable new paradigms in circuit designs, such as muti valued logic(MVL). These circuits focus on minimizing the hardware cost by processing more than two values per elementary operation. Therefore, it reduces the inter connection complexity of digital systems compared that of binary logiccircuits. Arithmetic circuits are playing an important key role in many electronic systems such asmicroprocessorsanddigitalsignal process orswith high efficiency. The efficiency of the systems are mainly evaluated by their arithmeticcircuit’s capability.With the help of these CNTFETS, the design of arithmetic circuits like half adder and multiplier will be proposed The above proposed halfadder and multiplieris simulatedby usingtheH-spicesoftware.

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