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Low Power Dynamically Reconfigurable Rd4a-Bk Stone- Based Hybrid Adder
Authors
1Student, ECE, IES College of Engineering,Chittilappily, Kerala, India. 2Assistant Professor, ECE, IES College of Engineering, Chittilappilly, Kerala, India.
Article Information
- DOI
- No DOI
- Organised By
- IES College of Engineering
- Conference Date
- 15 May 2023
- Pages
- 39-44
- Article Type
- Research Article
- Check for updates
- No DOI available for cross-reference
References
1. M. Ramasamy, G. Narmadha, and S. Deivasigamani, “Carry-based approximate full adder for low power approximate computing,” in
Proc. 7th Int. Conf. Smart Comput. Commun. (ICSCC), Jun. 2019, pp. 1–4.
2. V. Gupta, D. Mohapatra, A. Raghunathan, and K. Roy, “Low-power digital signal processing using approximate adders,” IEEE Trans.
Comput.-Aided Design Integr. Circuits Syst., vol. 32, no. 1, pp. 124–137, Jan. 2013.
3. G. Paim, L. M. G. Rocha, G. M. Santana, L. B. Soares, E. A. C. da Costa, and S. Bampi, “Power-, area-, and compression efficient
eight-point approximate 2-D discrete Tchebichef transform hardware design combining truncation pruning and efficient transposition
buffers,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 66, no. 2, pp. 680–693, Feb. 2019, doi: 10.1109/TCSI.2018.2868513.
4. C. Yang and H. Jiao, “Low power Karnaugh map approximate adder for error compensation in loop accumulations,” in Proc. Int.
Conf. IC Design Technol. (ICICDT), Jun. 2019, pp. 1–4.
5. C.-H. Lai, Y.-C. Cheng, T.-C. Wu, and Y.-J. Chang, “Radix-4 adder design with refined carry,” in Proc. IEEE Conf. Dependable
Secure Comput., Aug. 2017, pp. 300–304. Ratnaparkhe International ConferenceonCommunicationandSignalProcessing,April6-
8,2016,India
6. S. Natarajan, Imprecise and Approximate Computation, vol. 318. New York, NY, USA: Springer, 1995.
7. M. Biasielli, L. Cassano, and A. Miele, “An approximation-based fault detection scheme for image processing applications,” in Proc.
Design, Autom. Test Eur. Conf. Exhib. (DATE), Mar. 2020, pp. 1331–1334.
8. L. Jin and H. Liang, “Deep learning for underwater image recognition in small sample size situations,” in Proc. OCEANS Aberdeen,
Jun. 2017, pp. 1–4.
9. N.-C. Huang, S.-Y. Chen, and K.-C. Wu, “Sensor-based approximate adder design for accelerating error-tolerant and deep-learning
applications,” in Proc. Design, Autom. Test Eur. Conf. Exhib. (DATE), Mar. 2019, pp. 692–697.
10. O. Akbari, M. Kamal, A. Afzali-Kusha, and M. Pedram, “RAP-CLA: A reconfigurable approximate carry look-ahead adder,” IEEE
Trans. Circuits Syst. II, Exp. Briefs, vol. 65, no. 8, pp. 1089–1093, Aug. 2018.
Proc. 7th Int. Conf. Smart Comput. Commun. (ICSCC), Jun. 2019, pp. 1–4.
2. V. Gupta, D. Mohapatra, A. Raghunathan, and K. Roy, “Low-power digital signal processing using approximate adders,” IEEE Trans.
Comput.-Aided Design Integr. Circuits Syst., vol. 32, no. 1, pp. 124–137, Jan. 2013.
3. G. Paim, L. M. G. Rocha, G. M. Santana, L. B. Soares, E. A. C. da Costa, and S. Bampi, “Power-, area-, and compression efficient
eight-point approximate 2-D discrete Tchebichef transform hardware design combining truncation pruning and efficient transposition
buffers,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 66, no. 2, pp. 680–693, Feb. 2019, doi: 10.1109/TCSI.2018.2868513.
4. C. Yang and H. Jiao, “Low power Karnaugh map approximate adder for error compensation in loop accumulations,” in Proc. Int.
Conf. IC Design Technol. (ICICDT), Jun. 2019, pp. 1–4.
5. C.-H. Lai, Y.-C. Cheng, T.-C. Wu, and Y.-J. Chang, “Radix-4 adder design with refined carry,” in Proc. IEEE Conf. Dependable
Secure Comput., Aug. 2017, pp. 300–304. Ratnaparkhe International ConferenceonCommunicationandSignalProcessing,April6-
8,2016,India
6. S. Natarajan, Imprecise and Approximate Computation, vol. 318. New York, NY, USA: Springer, 1995.
7. M. Biasielli, L. Cassano, and A. Miele, “An approximation-based fault detection scheme for image processing applications,” in Proc.
Design, Autom. Test Eur. Conf. Exhib. (DATE), Mar. 2020, pp. 1331–1334.
8. L. Jin and H. Liang, “Deep learning for underwater image recognition in small sample size situations,” in Proc. OCEANS Aberdeen,
Jun. 2017, pp. 1–4.
9. N.-C. Huang, S.-Y. Chen, and K.-C. Wu, “Sensor-based approximate adder design for accelerating error-tolerant and deep-learning
applications,” in Proc. Design, Autom. Test Eur. Conf. Exhib. (DATE), Mar. 2019, pp. 692–697.
10. O. Akbari, M. Kamal, A. Afzali-Kusha, and M. Pedram, “RAP-CLA: A reconfigurable approximate carry look-ahead adder,” IEEE
Trans. Circuits Syst. II, Exp. Briefs, vol. 65, no. 8, pp. 1089–1093, Aug. 2018.
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