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Research Article

Simulation and FPGA based Implementation of PI and FUZZY Controllers for Cascaded Asymmetric Multilevel Inverter

  • Paper ID 84
  • Volume 5, Issue 2
  • Pages 09-20
  • Published Online: March-April 2024
  • 3 Views
Open Access Peer Reviewed Crossref DOI

Authors

  • Dr.T.S.Sivakumaran1
  • Henok G/Medihen Teklu2
  • Sime Gonfa Heyi3
  • SKB. Rathika4

1Professor / Power Engineering Electrical and computer science Engineering, Bule Hora University Oramia region, Ethiopia. 2 MSc., Power System Engineering (Electrical Engineering) Head of Department at Bule Hora University CET, ECE Department, Ethiopia. 3 Chief's and STEM power Technical Instructor, Ethiopia. 4 Assistant Professor, Dept of CSE, Sri Sakthi Engineering College, Coimbatore, Tamilnadu, India.

Article Information

Published Online
March-April 2024
Pages
09-20
Article Type
Research Article
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References

1. M.Murugesan, K.Ramani and S.Thangavel , “A Hybrid Multilevel Inverter with Reduced Number of Switches for Induction Motor
Drive” in African Journal of Scientific Research Vol. 4, No. 1 (2011).
2. M.Murugesan, R.Sakthivel, E.Muthukumaran and R.Sivakumar , “Sinusoidal PWM Based Modified Cascaded Multilevel Inverter”
in International Journal Of Computational Engineering Research (IJCER),Mar-Apr 2012, Vol. 2, No.2.
3. Rokan Ali Ahmed , S. Mekhilef and Hew Wooi Ping , “New multilevel inverter topology with reduced number of Switches” in 14th
International Middle East Power Systems Conference(MEPCON’10), Cairo University, Egypt, December 2010.
4. Hitesh Kumar Lade, Preeti Gupta and Amit Shrivastava, “Modelling and Simulation of Three-phase Induction Motor Fed by an
asymmetrically Configured Hybrid Multilevel Inverter” in International Journal Of Engineering And Computer Science , December
2013, Vol.2, No. 12.
5. J.I.Jithin and A.Benuel sathish raj, “A New Topology For A Single Phase 21 Level Multi Level Inverter Using Reduced Number Of
Switches” in International Journal of Engineering Research & Technology (IJERT), Vol. 2, No.2, February 2013.
6. Dhaval Patel, Himanshu, N. Chaudhari, Hina Chandwani and Anand Damle, “Analysis and Simulation of Asymmetrical Type
Multilevel Inverter using Optimization Angle Control Technique” in International Journal of Advanced Electrical and Electronics
Engineering, (IJAEEE), Vol.1, No. 3, 2012.
7. G. Mahalakshmi and P. Jeyalakshmi, “Analysis of 31 level cascade inverter using MATLAB” in International Journal of Advances
in Engineering & Technology (IJAET), November 2013, Vol.6, No. 5.
8. Kim, and Sun-Soon Park, “A Multilevel Soft-Switching Inverter with Inductor Coupling”, IEEE Transactions on Industry
Applications, Vol. 37, No. 2, MARCH/APRIL 2001, pp. 628.
9. Feel-Soon Kang, Sung-Jun Park, Man Hyung Lee, and Cheul-U Kim,“An Efficient Multilevel-Synthesis Approach and Its Application
to a 27-Level Inverter”, IEEE Transactions on Industrial Electronics, Vol. 52, No. 6, December 2005, pp 1600.
10. Feel-Soon Kang, Sung-Jun Park, Man Hyung Lee, and Cheul-U Kim,“An Efficient Multilevel-Synthesis Approach and Its Application
to a 27-Level Inverter”, IEEE Transactions on Industrial Electronics, Vol. 52, No. 6, December 2005, pp 1600.
11. Yu Liu, Alex Q. Huang, Wenchao Song, Subhashish Bhattacharya, and Guojun Tan, “Small-Signal Model-Based Control Strategy
for Balancing Individual DC Capacitor Voltages in Cascade Multilevel Inverter-Based STATCOM”, IEEE Transactions on
Industrial Electronics, Vol. 56, No. 6, June 2009, pp. 2259
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