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- Vol. 7 Issue 3
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Benchmarking Latency in Hybrid Cryptographic Architectures: A Java-Based Analysis of Post-Quantum Readiness
Authors
1 Department of Computer Science, HPPC Government First Grade College, Challakere, Karnataka, India.
Article Information
- Published In
- Volume 7, Issue 3 (2026)
- Published Online
- May-June 2026
- Pages
- 327-334
- Article Type
- Original Article
Abstract
View PDFAs quantum computing approaches cryptographic relevance, the imperative to secure digital infrastructure against "Harvest Now, Decrypt Later" (HNDL) attacks has intensified. Transitioning entirely to Post-Quantum Cryptography (PQC) introduces severe operational risks, leading standards bodies like NIST to recommend hybrid cryptographic architectures that pair classical algorithms (e.g., RSA, ECC) with quantum-resistant alternatives (e.g., ML-KEM, ML-DSA). However, the computational overhead, memory footprints, and latency penalties introduced by these dual-layer frameworks remain under-explored in enterprise execution environments. This paper presents a rigorous empirical benchmarking analysis of hybrid cryptographic architectures implemented within a Java-based enterprise framework utilizing the Bouncy Castle cryptography library. We systematically evaluate the computational latency, throughput, and CPU/memory utilization of various hybrid combinations—specifically pairing RSA-2048 and ECDH (X25519) with ML-KEM-768 for key encapsulation, and RSA-3072 with ML-DSA-65 for digital signatures—across simulated varying network overheads and concurrent workloads. Our findings quantify the exact latency penalties associated with hybrid handshakes, revealing that while lattice-based key encapsulation mechanisms introduce manageable overhead during initialization, digital signature verification exhibits a non-linear latency spike under high concurrency. Ultimately, this research provides concrete empirical data and design patterns to assist software architects in engineering crypto-agile, quantum-safe enterprise software without compromising real-time performance requirements.
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